This invention relates to a method and apparatus for examining electrostatic discharge damage to semiconductor devices, and more particularly to a method and apparatus of this kind, which can accurately determine the electrostatic discharge breakdown voltages of semiconductor devices enclosed in dielectric packages.
Conventionally, in handling IC devices, there often occurred accidents of sudden discharge of electrostatic charge of the mold packages, causing damage to insulating films within the devices. MOS IC devices in general are subjected to electrostatic breakdown tests for delivery, and only those ones which are found acceptable are delivered to users. However, in actual use or handling on the user side, even MOS IC devices found acceptable sometimes had dielectric breakdown and were sent back to the maker. Therefore, the appearance of a new testing method has been desired which is capable of accurately evaluating the susceptibility of semiconductor IC devices to such electrostatic discharge damage.
Typical conventional methods for examining electrostatic discharge damage to semiconductor IC devices include "the Human Body Model" and "the Charged Device Model".
FIG. 1 is a circuit diagram of a testing circuit for electrostatic discharge damage according to the Human Body Model which is employed in general. In the figure, the testing circuit comprises a direct-current voltage supply 1, a changeover switch SW1, an equivalent human body capacitance CD (e.g. 100-200 pF), an equivalent human body resistance RE, and a MOS IC device 2. The equivalent circuit of this MOS IC device is represented by an input protective resistance Rl, an input protective diode D, and a capacitance Cox of a gate-insulating film of a MOS transistor. The MOS IC device 2 has an input or output pin terminal 2a connected to an end of the resistance RE, and a supply pin terminal 2b connected to ground.
In the testing operation, first the switch SWl is connected to the voltage supply 1 to cause charging of the capacitance CD up to 250 volts, for instance. Then, the switch SWl is switched over to the resistance RE to cause discharge currents Il and I2 to flow through the IC device 2, as shown in FIG. 2, in such a manner that initially discharge current Il takes place through the capacitance Cox, and thereafter Zener current I2 flows through the diode D. The above applied voltage from the direct current voltage supply 1 is evaluated to be a withstanding voltage of the MOS IC device 2.
This conventional testing method, however, does not give any consideration to the package capacitance Cp, and it is therefore difficult with this method to accurately determine the electrostatic breakdown voltage of the MOS IC device.
FIG. 3 shows a circuit diagram of a testing circuit for electrostatic discharge damage according to the conventional Charged Device Model which takes into account the package capacitance. In FIG. 3, a MOS IC device 2 comprises an input or output pin terminal 2a, a supply pin terminal 2b, and a metal plate 4 disposed in contact with a package surface of the device and having a ground potential level. In testing operation, the switch SW2 is closed, and at the same time the switch SW3 is opened, to thereby cause charging of the package capacitance Cp (e.g. 2-5 pF) up to a testing voltage. Next, the switch SW2 is opened, and simultaneously the switch SW3 is closed, to thereby cause discharging of the package capacitance Cp, followed by checking damage to the gate-insulating film capacitance Cox by the charged voltage of the package capacitance Cp. FIG. 4 shows transient discharge current I3 flowing through the gate-insulating film capacitance, and transient discharge current I4 flowing through the protective diode D in the circuit of FIG. 3.
According to this Charged Device method, however, since the package capacitance Cp is very small, a discharge current flow through the diode D in the forward direction, which takes place upon opening of the switch SW2 and simultaneous closing of the switch SW3, can cause a drop in the testing voltage applied to the gate-insulating film capacitance Cox. Therefore, it is difficult to accurately determine the electrostatic breakdown voltage of the IC device.
As stated above, testing results according to the conventional electrostatic discharge damage testing methods are not so accurate as to assure users of the reliability of the semiconductor devices found acceptable after testing.